Not Applicable.
Not Applicable.
1. Field of Invention
The present invention relates generally to power electronics and, more particularly, to power factor correction (PFC) control circuits.
2. Description of the Background
The average power obtained from an AC line supply through an AC-to-DC power supply is always less than the product of the RMS (root mean square) voltage and the RMS current. The ratio of the average power to the product of the RMS voltage and the RMS current is known as the power factor. For example, a converter having a power factor of 70% means that the power drawn from the line supply is 70% of the product of the voltage and current in the line and, thus, only 70% of what could be obtained with a unity power factor.
To increase the power factor of a power supply, and hence the efficiency of the power supply, it is known to employ power factor correction (PFC). Indeed, PFC has become a required feature for most power supplies with an input power greater than 75 Watts. In general, PFC requires that the input current have a sinusoidal waveform and the current waveform be in phase with the input voltage waveform. Off-line switching power supplies without PFC exhibit a sharply peaked current waveform as high value input capacitors charge rapidly when the input voltage nears its maximum. Average filtering and elimination of the capacitors is ordinarily not a practical solution considering size, weight, and performance specifications.
It is known to implement PFC in a current controlled boost converter using a current feedback loop to control the input current waveform of the boost converter by continuously comparing the current to a rectified sine wave reference. The amplitude of the rectified sine wave reference may be modified to be proportional to an error signal, which is based on the DC output of the converter. It is also known to vary the amplitude of the sine wave reference with an analog multiplier circuit whereby the rectified input voltage is multiplied by the error signal. The result is that if the output voltage is above a desired value, the amplitude of the error signal and the rectified sine wave reference will decrease, and if the output voltage is below a predetermined value, the amplitude of the error signal and rectified sine wave will increase.
Typically, the variable, rectified sine wave reference is coupled to one input of an amplifier, and the other input is coupled to the rectified AC input current. The current feedback loop is arranged so that the output of the amplifier will cause the boost converter to operate in a way to force the current to follow the rectified sine wave reference. That is, if the instantaneous input current deviates from the rectified sine wave reference, the output of the amplifier drives the converter to decrease the deviation. Because the rectified sine wave reference is sinusoidal and in phase with the input voltage, the input current is also sinusoidal and in phase with the input voltage to realize PFC. Accordingly, if the load at the output increases, a resulting decrease in output voltage will cause the error signal to increase and, via the analog multiplier, cause the rectified sine wave reference to increase. This is turn will force the converter input current to increase, which will cause the output voltage to recover to the desired value.
It is also known to divide the rectified sine wave reference by the square of the RMS input voltage to improve the PFC control function. The result of dividing by the square of the RMS input voltage is to: (i) remove the unwanted increase in the rectified sine wave reference resulting from an increase in the input voltage; and (ii) effect a proportional decrease in the rectified sine wave reference required to maintain the input power constant.
Such PFC control circuits, however, are limited in their ability to precisely limit the input power because the analog multiplier is not very accurate. Consequently, the power limit may vary by as much 15% over the various input voltage conditions. To compensate for these variations, the boost converter may be over-designed to, for example, include a larger inductor or a higher-rated FET. These design modifications, however, introduce other deleterious effects, such as decreased efficiency and/or more expensive components.
Accordingly, there exists a need for a manner in which to achieve power factor correction more precisely than existing techniques, and without sacrificing overall efficiency and cost savings.
The present invention is directed to a power factor correction circuit for a boost power supply. According to one embodiment in which the boost power supply includes a boost converter responsive to a rectified AC line voltage, the power factor correction includes: a voltage feedback amplifier having a first input terminal responsive to an output voltage of the boost converter; a switching multiplier circuit having a first input terminal connected to an output terminal of the voltage feedback amplifier and a second input terminal responsive to the rectified AC line voltage; a current feedback amplifier having a first input terminal connected to an output terminal of the switching multiplier circuit and having a second input terminal responsive to an input current of the boost converter; and a pulse width modulator control circuit having an input terminal connected to an output terminal of the current feedback amplifier and having an output terminal for connection to a pulse width modulated switch of the boost converter.
According to another embodiment of the present invention, the power factor correction circuit includes: a first multiplier circuit having a first input terminal responsive to an input current of the boost converter and a second input terminal responsive to the rectified AC line voltage; a power feedback amplifier having an input terminal connected to an output terminal of the second multiplier circuit; a second multiplier circuit having a first input terminal connected to an output terminal of the power amplifier and a second input terminal responsive to the rectified AC line voltage; a current feedback amplifier having a first input terminal connected to an output terminal of the switching multiplier circuit and having a second input terminal responsive to the input current of the boost converter; and a pulse width modulator control circuit having an input terminal connected to an output terminal of the current feedback amplifier and having an output terminal for connection to a pulse width modulated switch of the boost converter.
According to another embodiment of the present invention, the power factor correction circuit includes: a voltage feedback amplifier having a first input terminal responsive to an output voltage of the boost converter; a first switching multiplier circuit having a first input terminal responsive to an input current of the boost converter and a second input terminal responsive to the rectified AC line voltage; a power feedback amplifier having an input terminal connected to an output terminal of the first switching multiplier circuit; a second switching multiplier circuit having a first input terminal connected to both an output terminal of the voltage feedback amplifier and an output terminal of the power feedback amplifier, a second input terminal responsive to the rectified AC line voltage, and an output terminal, wherein only one of the output terminal of the voltage feedback amplifier and the output terminal of the power feedback amplifier is operatively connected to the first input terminal of the switching multiplier circuit; a current feedback amplifier having a first input terminal connected to the output terminal of the second switching multiplier circuit and having a second input terminal responsive to the input current of the boost converter; and a pulse width modulator control circuit having an input terminal connected to an output terminal of the current feedback amplifier and having an output terminal for connection to a pulse width modulated switch of the boost converter.
According to another embodiment, the present invention is directed to a boost power supply including: a full-wave rectifier circuit coupled to an AC power source; a boost converter connected to the full-wave rectifier circuit for converting a rectified AC input voltage produced to a DC output voltage, the boost converter having a pulse width modulated switch; a pulse width modulator control circuit having an output terminal connected to a control terminal of the pulse width modulated switch of the boost converter; a voltage feedback amplifier having a first input terminal responsive to an output voltage of the boost converter; a first switching multiplier circuit having a first input terminal connected to an output terminal of the voltage feedback amplifier and a second input terminal responsive to the rectified AC line voltage; and a current feedback amplifier having a first input terminal connected to an output terminal of the switching multiplier circuit, a second input terminal responsive to an input current of the boost converter, and an output terminal connected to an input terminal of the pulse width modulator circuit. According to another embodiment, the power supply additionally includes a second switching multiplier circuit having a first input terminal responsive to the input current of the boost converter and a second input terminal responsive to the rectified AC line voltage, and a power feedback amplifier having an input terminal connected to an output terminal of the second multiplier circuit and an output terminal connected to the first input terminal of the first switching multiplier circuit, wherein only one of the output terminal of the voltage feedback amplifier and the output terminal of the power feedback amplifier is operatively connected to the first input terminal of the switching multiplier circuit.
The present invention provides an advantage in comparison with prior art power factor correction techniques because it is capable of more precisely limiting the input power. Using the PFC technique of the present invention, it is reasonable to expect the power limit accuracy to be on the order or +/xe2x88x925%. In addition, the improved accuracy of the switching multiplier permits the use of less expensive components in the boost power supply. These and other benefits of the present invention will be evident from the detailed description hereinbelow.